1. Field
Embodiments described in this specification relate generally to an output buffer circuit, an input buffer circuit, and an input/output buffer circuit disposed between an input/output pad and various kinds of circuits in a semiconductor integrated circuit.
2. Description of the Related Art
A semiconductor integrated circuit has a buffer circuit disposed between an input/output pad and various kinds of circuits. The slew rate of this kind of buffer circuit can be changeable in several stages in accordance with the specification and so on of the semiconductor integrated circuit. In this buffer circuit, multiple stages of buffer circuits are provided, and some of them are selectively driven or all are driven, thereby rendering the slew rate thereof changeable a number of states such as low drive state (Under Drive), normal drive state (Normal), and high drive state (Over Drive).
However, when adjusting the slew rate in several stages in this way, dispersion of transistor characteristics in manufacturing processes sometimes causes the drive capacity of each of the buffer circuits to change, whereby the difference in drive capacity of each of the drive states differs from expected value. The drive capacity of each stage of buffer circuit changing more than expected in this way causes timing precision of input/output signals to deteriorate and inhibits high-speed operation of the circuit.